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Video IP Cores

Video IP Cores

Silicon Image Video IP Cores are designed as system-on-a-chip (SoC) solutions for DVD and STB/DTV markets at the lowest possible silicon costs. Its interfaces are optimized for easy integration using the standard on-chip bus approach. This dramatically reduces the integration effort and enables fast time-to-market developments.

For more information on specific video IP cores, please click on the links below.


Video IP Cores
ProductDescription
cineramIC-3D/4K Multi-Standard Ultra High-Definition Video Decoder IP CoreThe cineramIC-3D/4K Multi-Standard Ultra High-Definition Video Decoder IP core supports H.264, MPEG-1/2 and VC-1 video standards including H.264 MVC (Multiview Video Coding) and JPEG standards for still picture applications. Automatic multi-stream video decoding is supported for up to to 16 streams without additional software interaction. Driver software performs set up and general controlling tasks requiring fewer than 2 MIPS of CPU resources on common general purpose 32-bit processors.
cineramIC-3D/4K FPGA Multi-Standard Ultra High-Definition Video Decoder IP CoreThe cineramIC-3D/4K FPGA Multi-Standard Ultra High-Definition Video Decoder IP core supports H.264, MPEG-1/2 and VC-1 video standards including H.264 MVC (Multiview Video Coding) and JPEG standards for still picture applications. Automatic multi-stream video decoding is supported for up to 16 streams without additional software interaction. The scalable architecture supports FPGA implementations by reducing the clock frequency to function in an FPGA environment. Driver software performs set up and general controlling tasks requiring fewer than 2 MIPS of CPU resources on common general purpose 32-bit processors.
M2VD-2HLSilicon Image’s M2VD-2HL is designed to be used in system-on-a-chip solutions for DVD and STB/DTV markets. With its extensive set of features M2VD-2HL enables companies to easily provide functions like parallel viewing and recording, picture-in-picture or simultaneous viewing of several channels in television, PC or other relevant environments.
MSVD-HDThe Multi-Standard High-Definition Video Decoder (MSVD-HD) is one of the smallest synthesizable cores in the market, performing time multiplexed decoding of multiple streams in different standards at all resolutions up to 2048x2048 pixels.
ASDThe ASD can manage multiple simultaneous transport streams from different tuners and generate a partial transport stream for recording to a hard drive or solid state drive.
MVDUThe MVDU is designed to read decoded video data, on-screen-display data and ancillary data from external memory and combine the sources into a video stream up to 1080p.


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