Multi-standard and Multi-stream Ultra High-Definition Video Decoder (H.264, MPEG-1/2, VC-1, JPEG) with 3D/MVC Support for Real-Time FPGA Designs

The cineramIC-3D/4K FPGA Video Decoder IP Core is a scalable design optimized for use on FPGAs performing time multiplexed decoding of multiple streams in different standards at the lowest clockrates (e. g. one 4Kx2Kp@30fps or one 3D 1080p@60fps or two 1080p@60fps streams at 100MHz). It is substantially more efficient than fully programmable solutions.

The cineramIC-3D/4K FPGA Video Decoder IP Core supports H.264, MPEG-1/2 and VC-1 video standards including H.264 MVC (Multiview Video Coding) and JPEG standards for still picture applications. Automatic multi-stream video decoding is supported for up to 16 streams without additional software interaction. The scalable architecture supports FPGA implementations by reducing the clock frequency to function in an FPGA environment. Driver software performs set up and general controlling tasks requiring fewer than 2 MIPS of CPU resources on common general purpose 32-bit processors.

This IP core reads the input stream from a buffer located in the system memory (SDRAM) and generates decoded video in YCbCr 4:2:0 and 4:2:2 (JPEG) formats. The output pictures are stored in the decoded picture buffer area within the system memory.

The cineramIC-3D/4K FPGA Video Decoder IP Core implementation is optimized for real-time video decoding applications on FPGAs based on an architecture that implements pipelining and parallelism on different levels. The cineramIC-3D/4K FPGA Video Decoder IP Core consists of a software and a hardware component. The hardware is composed of three main blocks, the Stream Interpreter, the Multi-pipeline Scheduler and the scalable Multi-Standard Video Decoding Engine (VDE). In order to achieve maximum performance, all blocks work in parallel. Its interfaces can be easily integrated into real-time FPGA designs.

Applications: Ultra-HD and 3D Decoding , Multi-view Applications , Professional 4K and 3D Cameras , Professional Broadcast Systems , Professional Video Editing , Medical Imaging , Surveillance

Other Features & Benefits

General Features

• Supported standards:
• ITU-T H.264 incl. Annex H, MVC, ISO/IEC 14496-10 (Main and High Profile up to Level 5.1)
• SMPTE 421M VC-1 (Simple, Main and Advanced Profile @ Level 4)
• ISO/IEC 11172-2 MPEG-1
• ISO/IEC 13818-2 MPEG-2 (Main Profile @ High Level)
• Supports 3D video
• Supports up to 4096 x 2304 pixel resolutions (4Kx2K)
• Supports Exif JPEG up to 16Kx8K picture size
• Supports all DVTB, ATSC, HDTV, DVD, VCD resolutions (e.g. 1080p, 1080i, 720p, D1)
• Hardware supported context switching between video streams (configurable up to 16 streams)
• Error detection and concealment
• Trick mode support
• Processing of ES and PES streams, extraction and provision of time stamps
• FPGA core and memory system can run with different clocks; clock domain crossing is part of the IP core
• Implementation for ASIC SoC available
• Allegro H.264 certification test suite proven
• 64-bit ports to memory system, OCP 2.0 and AMBA AXI compliant
• Runs on FPGAs such as Altera Stratix III/IV or Xilinx Virtex 5/6

• FPGA driver software is provided with an easy to use API incorporates multi-stream / multi-standard control
• C source code, portable to any CPU

• Single-stream decode up to 4Kx2Kp @ 30 fps at 100MHz core clock frequency
• Single-stream decode up to 3D 1080p at 60 fps at 100MHz core clock frequency
• Dual-stream decode up to 1080p @ 60 fps at 100MHz core clock frequency
• Time multiplexed multi-stream decoding up to 16 streams, example combinations are:
• Four HD video streams H.264, MPEG-2,VC-1
  
• Two H.264 HD streams and eight MPEG-2, SD streams
• Exif JPEG decoding ~3 Mpixel/MHz, e.g. 8 Mpixel @ 38 fps or 32 Mpixel @ 9 fps at 100MHz core clock frequency
• Hardwired, autonomously running decoding pipeline, two samples per clock throughput

• Verilog RTL code with synthesis scripts
• Extensive verification environment
• Reference software
• Detailed user manuals for hardware and software