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SiI3531 - PCI Express (1x) to 1 Port SATA300 

PCI Express (1x) to 1 Port SATA300 (SiI3531)

The SiI3531 is a single-lane PCI Express to single port Serial ATA (SATA) II host controller that offers best in class SATA price/performance and is both flexible and robust enough for today’s demanding storage applications.  The SiI3531 supports all Serial ATA II features, including 3.0 Gbps SATA II transfer speeds, Native Command Queuing, port multipliers with FIS-based switching, programmable output signal swing strengths for longer external cables or extended backplanes, hot plugging, enclosure management and ATAPI device support.

Applications: Embedded Applications , ExpressCard Applications , PC Motherboards , Server Motherboards



 

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PCI Express Features

  • Supports one-lane, 2.5 Gbps PCI Express
  • Compliant with PCI Express 1.0a specification 
  • Supports hot plug for ExpressCard applications 
  • All registers appear in unified memory space 
  • All registers accessible through I/O space 
  • Full-chip command-completion status accessible with single PCI Express access

Serial ATA Features

  • Integrated Serial ATA Transport, Link and PHY logic
  • Compliant with Serial ATA 1.0a specification with support for SATA II optional features
  • Supports 2nd-generation Serial ATA II transfer rate of 3.0 Gbps
  • Plesiochronous, single PLL architecture, with one PLL
  • Signal output amplitude control for external SATA
  • Independent Link, Transport and data FIFO 
  • Independent command fetch, scatter/gather and command execution
    • Hard-coded state machines for streamlined command execution
    • Supports Native Command Queuing and Tagged Command Queuing
    • Supports first-party DMA
    • Supports port multipliers with FIS-based switching under hardware control
  • 31 commands and scatter/gather tables
  • Protocol override per command
  • Spread spectrum support

General Features

  • Host Protocol
    • Optimized for transaction-oriented designs; minimal host overhead
    • Supports two command-issuance mechanisms
      • Efficient in both embedded and PC implementations
      • Reduces dependency on bridge behavior

Power

  • 1.8V PHY/ core and 3.3V I/Os

Package

  • 48 -pin QFN with EPAD
    • 7x7 mm (0.4mm lead pitch)


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